Many communication systems employ adaptive equalization to mitigate the impact of signal distortions introduced by propagation over dispersive media. Examples include telephone and radio channels, and 10 Gbps multi-mode fiber-optic systems found in emerging Ethernet local area networks (LANs). The predominant impairment to reliable communication over these channels is intersymbol interference (ISI). Equalization employs both linear and non-linear signal processing techniques to remove the effects of ISI. Equalizers operate adaptively in practice to cope with the time varying nature of many dispersive media.
Class of Equalizer
Practical systems often use maximum likelihood sequence estimation (MLSE), a feedforward equalizer (FFE) or transversal filter, or a form of a decision-feedback equalizer (DFE) to perform conventional adaptive equalization. MLSE, FFE or DFE may be used in both low rate and high rate applications. Typically, the FFE is not a preferred choice due to noise-enhancement issues for heavily dispersive media. Although the performance of MLSE is optimal and can exceed that of the DFE, its complexity often limits its use to low rate applications such as voice-band modems. The DFE represents the preferred choice in high rate systems such as 10 Gbps fiber-optic LANs where high power consumption renders MLSE impractical.
Class of Implementation
Common architectures for a DFE may be classified into three classes of implementation based on which technology is selected for the data path and control: (i) discrete-time architecture, (ii) continuous-time architecture, and (iii) hybrid architecture.
The discrete-time architecture uses a sampled data approach to convert the distorted input continuous-time (analog) waveform to a sampled discrete-time signal, typically using a high-resolution analog-to-digital converter (ADC). The full data path and control elements of the DFE are then implemented in digital hardware or perhaps in software on a digital signal processor, depending on the data rate of the application. The high power consumption of this approach renders it unattractive for 10 Gbps fiber-optic LANs, and impractical for systems using low-power and low-cost optical modules.
The continuous-time DFE architecture implements the data path and control elements in analog circuitry. A pure analog solution is sensitive to DC offsets due to device mismatch, process & temperature variations, and data path latency mismatches, all of which are difficult to manage robustly. Moreover, the bandwidth of the control circuitry required is nearly three orders of magnitude lower than the line rate for 10 Gbps fiber-optic LANs. Analog implementations of these low bandwidth control loop filters require large off-chip capacitors, leading to increased cost and board area. Alternately, high bandwidth loop filters using smaller on-chip capacitors may be used but this leads to increased power consumption of the control portion of the architecture.
The hybrid architecture uses high bandwidth analog circuitry to implement the data path and low-rate digital circuitry to implement the control portion of the DFE. This hybrid architecture is well suited to for 10 Gbps fiber-optic LANs as it eliminates most of the drawbacks outlined above for the discrete-time and continuous-time architectures outlined above.
Class of Tap Weight Optimization
Conventional equalizers employ coefficients or “tap weights” to adjust their response to compensate for that of the unknown transmission medium. An adaptive mechanism often provides a means to optimize these tap weights autonomously. This practice is useful not only for unknown channels but also to compensate for variations in device characteristics over time such as temperate and device aging.
The minimum mean square error (MMSE) and zero-forcing (ZF) criteria represent the two most popular approaches for tap weight adjustment. The least mean square (LMS) algorithm provides an adaptive solution to solving the MMSE problem by moving the weights in the direction dictated by a noisy estimate of the actual gradient vector for the underlying squared error surface. An adaptive solution for the ZF problem uses a similar approach, albeit with a slightly different formulation of the cost function.
Reduced complexity variants of the adaptation algorithms for both the MMSE and ZF criteria are well known and have similar structure. A generic class of “sign/sign” algorithms employs single-bit representations of the “data” and “error” input signals used by the adaptation algorithms to achieve acceptable performance with low implementation complexity.
Conventional ZF-DFE With Sign/Sign Adaptation
This section outlines the prior art required to implement a zero-forcing decision feedback equalizer with sign/sign adaptation.
Channel Impulse Response
The design of a conventional ZF-DFE is tailored to the channel impulse response to be equalized. For simplicity of description, FIG. 1(a) shows the discrete time samples of a typical channel impulse response. The composite “channel” represents the cascade of all system filtering effects, including the impulse responses of the transmit pulse shaping, the transmission medium, and any front-end receiver filtering up to the input of the ZF-DFE.
The channel impulse response introduces ISI to the desired symbol from post-cursor components contributed by past symbols, and pre-cursor components originating from future symbols yet to be transmitted. FIG. 1(a) shows a channel impulse response with L post-cursor symbols, and F pre-cursor symbols. The total span of L+F, along with the specific frequency domain response determined by the channel coefficients {h−L, . . . ,h−1,h0,h1, . . . ,hF} influence the complexity of the conventional ZF-DFE required for equalizing such a response.
ZF-DFE Architecture & Operation
A block diagram of the conventional ZF-DFE is shown in FIG. 2. The architecture consists of “data path” and “control” elements, The “data path” consists of the FFE DATA PATH 100, DFE DATA PATH 101 and DATA SLICER 102, and serves to cancel the pre-cursor ISI, post-cursor ISI, and make a final data decision. The “control” elements consist of the ERROR SLICER 103, FFE CORRELATORS 104 and DFE CORRELATORS 105, and serve to determine adaptively two sets of tap weights {f0, . . . ,fF} for the FFE DATA PATH 100 and {b1, . . . ,bB} for the DFE DATA PATH 101 that optimize the cancellation of ISI by the data path.
The FFE DATA PATH 100 processes the input signal with a linear transversal filter to remove the pre-cursor ISI contained therein. FIG. 3 provides a detailed diagram of the block. The tap weights {f0, . . . ,fF} of the filter provide (1+F) degrees of freedom by which the zero-forcing criterion may modify the channel impulse response to cancel the pre-cursor ISI samples. FIG. 1(b) shows that pre-cursor samples {h1, . . . ,hF} of the original channel impulse response from FIG. 1(a) are now zero-valued at the output of the filter, and the post-cursor response has been modified from samples {h−1, . . . ,h−L} to samples {b1, . . . ,bB}. The FFE CORRELATORS 104 determines the values of the tap weights {f0, . . . ,fF} using an adaptive algorithm outlined below.
The output of the FFE DATA PATH 100 may be described mathematically as follows. Assume the sequence of data symbols { . . . ,dk−1,dk,dk+1, . . . } was sent over the transmission medium. Since all pre-cursor ISI is cancelled by the application of tap weights {f0, . . . ,fF}, then according to the equivalent impulse response shown in FIG. 1(b) the signal γk at the output of the FFE DATA PATH 100 is given by:
                              y          k                =                              d            k                    +                                    ∑                              n                =                1                            B                        ⁢                                                  ⁢                                          d                                  k                  -                  n                                            ·                                                b                  n                                .                                                                        (                  Eq          .                                          ⁢          1                )            
The first term in (Eq. 1) is the desired symbol dk and the second term represents the post-cursor ISI that remains uncancelled.
The DATA SLICER 102 performs a memoryless slicing operation against zero to determine the detected symbols decisions { . . . ,{circumflex over (d)}k−1,{circumflex over (d)}k,{circumflex over (d)}k+1, . . . } corresponding to the transmitted symbols { . . . ,dk−1,dk,dk+1, . . . }. Decision errors are made when the detected symbol {circumflex over (d)}k is not equal to transmitted symbol dk.
The DFE DATA PATH 101 processes the output of the DATA SLICER 102, using its sequence of past data decisions to synthesize an estimate of the post-cursor ISI that remains at the output of the FFE DATA PATH 100. This ISI estimate is then subtracted away leaving the input to the DATA SLICER 102 free from ISI. FIG. 4 provides a detailed diagram of the block. The equivalent impulse response samples {b1, . . . ,bB} from FIG. 1(b) form the tap weights of a transversal filter operating on input sequence { . . . ,{circumflex over (d)}k−1,{circumflex over (d)}k,{circumflex over (d)}k+1, . . . } to synthesize the following estimate rk of the post-cursor ISI:
                              r          k                =                              ∑                          n              =              1                        B                    ⁢                                          ⁢                                                    d                ^                                            k                -                n                                      ·                                          b                ^                            n                                                          (                  Eq          .                                          ⁢          2                )            
The DFE CORRELATORS 105 produces the estimates {{circumflex over (b)}1, . . . ,{circumflex over (b)}B} in (Eq. 2) of the post-cursor impulse response coefficients {b1, . . . ,bB} using an adaptive algorithm outlined below.
The DATA SLICER 102 performs a memoryless slicing operation against zero to determine the detected symbols decisions { . . . ,{circumflex over (d)}k−1,{circumflex over (d)}k,{circumflex over (d)}k+1, . . . } corresponding to the transmitted symbols { . . . ,dk−1,dk,dk+1, . . . }. Decision errors are made when the detected symbol {circumflex over (d)}k is not equal to transmitted symbol dk. During normal system operation where the bit error rate (BER) is low, the output decisions {circumflex over (d)}k equal the transmitted symbols dk. If follows that when the DFE tap weights {{circumflex over (b)}1, . . . ,{circumflex over (b)}B} approximate closely the impulse response coefficients {b1, . . . ,bB}, the DATA SLICER 102 input signal zk is nearly devoid of post-cursor ISI:
                              z          k                =                                            d              k                        +                                          ∑                                  n                  =                  1                                B                            ⁢                                                          ⁢                                                d                                      k                    -                    n                                                  ·                                  b                  n                                                      -                                          ∑                                  n                  =                  1                                B                            ⁢                                                          ⁢                                                                    d                    ^                                                        k                    -                    n                                                  ·                                                      b                    ^                                    n                                                              ≈                      d            k                                              (                  Eq          .                                          ⁢          3                )            
The result in (Eq. 3) shows mathematically how the ZF-DFE uses the FFE DATA PATH 100 and DFE DATA PATH 101 to process the input signal and cancel its pre-cursor and post-cursor ISI. FIG. 1(c) shows the same result in terms of the equivalent impulse response of the system, seen from the transmitter through to the input to the DATA SLICER 102.
ZF Tap Weight Adaptation
The ERROR SLICER 103, DFE CORRELATORS 105 and FFE CORRELATORS 104 of FIG. 2 form the control portion of the ZF-DFE responsible for computing adaptively the tap weights {f0, . . . ,fF} and {b1, . . . ,bB} required by the data path to mitigate the ISI. The “zero-forcing” algorithm drives the tap weights towards their optimal settings by driving the residual correlation between the outputs of the “error” and “data” signals to zero.
The DATA SLICER 102 produces the “data” signal input to the correlators as outlined above by making memoryless decisions {{circumflex over (d)}k} on the transmitted data. The “error” signal input to the correlators represents the difference between the DATA SLICER 102 input signal zk and output signal {circumflex over (d)}k, and is produced by the ERROR SLICER 103.
FIG. 5 shows a block diagram of the internal details of the FFE CORRELATORS 104 of FIG. 2. The “data” input enters shift register 104d, and the “error” input enters shift register 104e. The length of each shift register is identical and matches the total span of the equalizer shown in FIG. 1(b), or a total of (1+F+B) symbols. The outputs of cells 104d(0) through 104d(F−1) form inputs to a bank of TAP CORRELATOR blocks 104-0 through 104-(F). Output signal sd(0) from cell 104d(0) forms the first input to TAP CORRELATOR 104-0, output signal sd(1) from cell 104d(1) forms the first input to TAP CORRELATOR 104-1, and so on, such that output-signal sd(F−1) forms the first input to TAP CORRELATOR 104-(F−1). The. “data” input signal forms the first input to TAP CORRELATOR 104-(F). The second input signal of all TAP CORRELATOR blocks, signal se(0), is taken from the output of cell 104e(0) from shift register 104e. TAP CORRELATOR 104-0 produces tap weight f0 for the FFE DATA PATH 100 of FIG. 2 TAP CORRELATOR 104-1 produces tap weight f1, and so on, such that TAP CORRELATOR 104-(F) produces tap weight fF. All TAP CORRELATOR blocks are identical, but are simply driven by different inputs on the first port.
FIG. 6 shows a block diagram of the internal details of the DFE CORRELATORS 105 of FIG. 2. The “data” input enters shift register 105d, and the “error” input enters shift register 105e. The length of each shift register is identical and matches the total span of the equalizer shown in FIG. 1(b), or a total of (1+F+B) symbols. The outputs of cells 105d(−1) through 105d(−B) form inputs to a bank of TAP CORRELATOR blocks 105-1 through 105-(B). Output signal sd(−1) from cell 105d(−1) forms the first input to TAP CORRELATOR 105-1, output signal sd(−2) from cell 105d(−2) forms the first input to TAP CORRELATOR 105-2, and so on, such that output signal sd(−B) form cell 105d(−B) forms the first input to TAP CORRELATOR 105-(B). TAP CORRELATOR 105-1 produces tap weight b1 for the DFE DATA PATH 101 of FIG. 2, TAP CORRELATOR 105-2 produces tap weight b2, and so on, such that TAP CORRELATOR 105-(B) produces tap weight bB. All TAP CORRELATOR blocks are identical, but are simply driven by different inputs on the first port.
The conventional ZF tap weight adaptation algorithm for updating the FFE tap weights based on the data and error input signals identified above is given by the following recursive equation:fn,k+1=fn,k−μ·ek·dk+n.  (Eq. 4)
In (Eq. 4), the index n runs through the tap weights {f0, . . . ,fF} from 0 to F, the tap weights have been given an additional suffix k and k+1 to denote time. The step size parameter μ controls the convergence rate of the algorithm.
The conventional ZF tap weight adaptation algorithm for updating the DFE tap weights based on the data and error input signals identified above is given by the following recursive equation:bn,k+1=bn,k+μ·ek·dk−n.  (Eq. 5)
In (Eq. 5), the index n runs through the tap weights {b1, . . . ,bB} from 1 to B.
Sign/Sign Tap Weight Adaptation
The tap update equations of (Eq. 4) and (Eq. 5) may be implemented in analog or digital circuitry. For 10 Gbps fiber-optic LAN applications where the channel dynamics vary orders of magnitude slower than the line rate, the tap updates can be performed digitally with much lower power. Since a data path implemented in analog circuitry provides the “error” and “data” inputs in this application, some form of high-speed ADC is required to convert these inputs to digital form. This approach becomes cost and power prohibitive if a high-resolution ADC is required to supply the full precision samples of “error” and “data” inputs dictated by the multiplication shown in (Eq. 4) and (Eq. 5).
The conventional approach to avoiding the cost and power drawbacks of a high-resolution ADC for these tap weight updates in high rate applications such as fiber-optic LANs is to use the “sign/sign” algorithm. Essentially, the high resolution ADC is replaced with a single-bit resolution ADC. Only the “sign bit” of the tap correlator inputs is retained for the computations as shown for the FFE tap weights in the following equation:fn,k+1=fn,k−μ·sgn(ek)·sgn(dk+n).  (Eq. 6)
In binary systems where the data is antipodal, sgn(dk)=dk, so this has no impact. But the error term in (Eq. 6) is now quantized to a single bit, reducing the implementation complexity from a high resolution ADC to a single high-speed comparator circuit.
A block diagram of the “sign/sign” TAP CORRELATOR block is shown in FIG. 7.
Deficiency of “Sign/Sign” Algorithm and Residual ISI Problem
This section outlines the deficiency of the “sign/sign” adaptation algorithm in the presence of strong residual ISI.
Source of Residual ISI
In many applications, the span of the equalizer does not fully cover the length of the channel impulse response. Most often this situation occurs due to cost and power consumption constraints. It is always desirable to build a longer equalizer, but this is not always practical.
One example of this occurs in 10 Gbps fiber-optic LANs where the channel impulse response can span upwards of 4 to 7 symbol periods. In these cases, the span of the pre-cursor ISI may be 3 or more symbols in length. Building large on-chip transversal filters of the type shown in FIG. 3 becomes extremely difficult and costly at these lengths, requiring more than 3 mm of on-chip transmission line and bulky on-chip inductors. Similarly, the span of post-cursor ISI may be of similar length. Long tapped delay lines of the type shown in FIG. 4 also become costly in power consumption and complexity due to high rate clock distribution and load matching issues.
FIG. 8 quantifies the channel impulse response and equalizer parameters for a generic system with residual ISI. FIG. 8(a) shows a channel impulse response with total span of (L+F+A) symbols. The pre-cursor portion spans (F+A) symbols, which exceeds the span F of the FFE DATA PATH 100 by A symbols. With only (1+F) degrees of freedom to cancel the pre-cursor ISI, the FFE DATA PATH 100 can only cancel the closest F symbols leaving A residual ISI symbols outside its span as shown in FIG. 8(b). Furthermore, the span of the channel impulse response at the output of the FFE DATA PATH 100 contains (B+R) symbols of post-cursor ISI, which exceeds the span of B of the DFE DATA PATH 101 by R symbols. The DFE DATA PATH 101 can only cancel the closest B symbols, leaving R residual ISI symbols outside its span as shown in FIG. 8(c).
In summary, FIG. 8 shows the result of using a ZF-DFE with an equalizer span that is shorter than the span of the channel impulse response to be equalized. Use the notation (F, B) to denote a ZF-DFE configured to cancel a span of F pre-cursor symbols and a span of B post-cursor symbols. The same notation (F+A,B+R) may be used to denote a channel impulse response with a span of (F+A) pre-cursor symbols and a span of (B+R) post-cursor symbols. Using this notation, FIG. 8 demonstrates the location of the residual pre-cursor and post-cursor ISI samples that result when a (F,B) ZF-DFE is employed over a transmission medium with a (F+A,B+R) channel impulse response.
To clarify further, the signal zk that drives the input to the DATA SLICER 102 is given by the following equation assuming the operating scenario depicted in FIG. 8:
                                          z            k                    =                                    d              k                        +                                          ∑                                  m                  =                  1                                A                            ⁢                                                          ⁢                                                d                                      k                    +                    F                    +                    m                                                  ·                                  a                  m                                                      +                                          ∑                                  n                  =                  1                                R                            ⁢                                                          ⁢                                                d                                      k                    -                    B                    -                    n                                                  ·                                  r                  n                                                      +                          Δ              k                                      ,                            (                  Eq          .                                          ⁢          7                )            where any residual error resulting from imperfect cancelling of the pre-cursor ISI lying inside the span of the FFE DATA PATH 100, as well as the post-cursor ISI lying inside the span of the FFE DATA PATH 101, is captured by the residual error term Δk. As will be shown below, the “sign/sign” adaptation algorithm uses this error term to adjust the tap weights.Need to Operate Under Residual ISI Conditions
The presence of residual ISI that is not cancelled by a “short” ZF-DFE (ie. with span shorter than the channel impulse response) degrades the error performance of the system by introducing eye closure and increased jitter at the input to the DATA SLICER 102. Indeed, the two summation terms in quantify the eye closure due to residual ISI. This performance degradation is tolerable in many cases. In fact many systems can have sufficient margin in the link budget to operate at their target BER levels with small to moderate amounts of residual ISI. In other scenarios, it is desirable to operate the ZF-DFE at much harsher conditions than the nominal system target. One example is “diversity tracking” , where a secondary or “backup” ZF-DFE evaluates candidate tap weight solutions while a “primary” ZF-DFE provides the “in-service” link. The secondary ZF-DFE often sees a significantly larger level of residual ISI than the primary ZF-DFE in these scenarios.
The desire to operate the ZF-DFE under harsh conditions with significant levels of residual ISI leads to the requirement that the “sign/sign” adaptation algorithm must also perform its acquisition and tracking of the tap weights under these same conditions. The ZF-DFE data path cannot operate under these conditions unless its controller supplies an appropriate set of tap weights.
Failure of the Sign/Sign Adaptation Algorithm
The conventional “sign/sign” adaptation algorithm fails in the presence of strong residual ISI due to a masking effect that destroys the correlation between the single-bit “data” and “error” signals. This renders the correlators ineffective at both acquisition and tracking, since there is no useful correlation input from which to drive the tap weights in the proper direction. In effect, the presence of residual ISI produces a “dead zone” in the correlator input.
The impact of this dead zone can be illustrated by considering a simple example. Consider a system with no residual pre-cursor ISI (A=0), one symbol of residual post-cursor ISI (R=1), and a single DFE tap weight (B=1). In this case, the input signal to the DATA SLICER 102 is given by:zk=dk+Δk+dk−2r1.  (Eq.8)
In (Eq. 8), the first term is the desired symbol, the second term Δk=(dk−1b1−{circumflex over (d)}k−1{circumflex over (b)}1) is the residual “error” signal resulting from imperfect zero-forcing cancellation that drives the tap correlator, and the third term is the residual post-cursor ISI. Assuming that the output of the DATA SLICER 102 is correct, the output of the ERROR SLICER 103 is given by:ek=(dk−1b1−{circumflex over (d)}k−1{circumflex over (b)}1)+dk−2r1.  (Eq. 9)
Under normal operating conditions where {circumflex over (d)}k−1=dk−1, the first term in (Eq. 9) will be proportional to the tap error b1−{circumflex over (b)}1 and so its sign will be an accurate reflection of the direction in which the tap correlator must move the tap weight to further reduce the tap error. The sign of the first term also remains correlated with the data term dk−1. However, in the presence of residual ISI, we must take the sign of the full (Eq. 9), not just its first term. In this case, the second term is significantly larger than the tap error of the first term. Moreover the data term dk−2 is not correlated with dk−1 in any way. Both of these effects contribute to a masking of the first term by the second term, leading to the “dead zone” at the input to the correlators mentioned above.
Extending the discussion from the simple case above to the general case of FIG. 8, with an input signal zk to the DATA SLICER 102 given in (Eq. 7), and assuming that the DATA SLICER 102 {circumflex over (d)}k=dk, the output of the ERROR SLICER 103 is given by:
                              e          k                =                              Δ            k                    +                                    ∑                              m                =                1                            A                        ⁢                                                  ⁢                                          d                                  k                  +                  F                  +                  m                                            ·                              a                m                                              +                                    ∑                              n                =                1                            R                        ⁢                                                  ⁢                                          d                                  k                  -                  B                  -                  n                                            ·                                                r                  n                                .                                                                        (                  Eq          .                                          ⁢          10                )            
The two summation terms in (Eq. 10) represent residual pre-cursor and post-cursor ISI that serve to mask the desired error term Δk in the error signal ek. Taking the sign of (Eq. 10) does not provide an accurate approximation to Δk due to the presence of the residual ISI terms. The presence of so many uncorrelated noise terms in the two summation terms creates the “dead-zone” in the general case that was also seen above for the simple case.